A modern integrated circuit (IC) must meet very stringent design and performance specifications. In many applications for communication devices, transmit and receive signals are exchanged over communication channels. These communication channels include impairments that affect the quality of the signal that traverses them. One type of IC that uses both a transmit element and a receive element is referred to as a serializer/deserializer (SERDES). The transmit element on a SERDES typically sends information to a receiver on a different SERDES over a communication channel. One of the functions of the receiver is to convert a high-speed serial data stream to a lower speed parallel data stream, thus providing the “deserializer” functionality.
The “deserializer” functionality is performed by a serial-to-parallel converter, which uses a high-speed clock signal to perform the data parallelization. For example, in an existing SERDES system operating at a data rate of 28 gigabits per second (Gbps) or higher, a clock operating at 14 gigahertz (GHz) (referred to as an “F2” clock, with an “F1” clock operating at 28 GHz), was typically used to convert the data (also operating at 14 GHz) from a serial stream to multiple parallel data streams. Unfortunately, routing and gating a clock operating at 14 GHz is difficult and consumes a large amount of power.
Data parallelization becomes even more challenging when attempting to design and fabricate a receiver that can operate using both PAM 2 and PAM 4 modalities. The acronym PAM refers to pulse amplitude modulation, which is a form of signal modulation where the message information is encoded into the amplitude of a series of signal pulses. PAM is an analog pulse modulation scheme in which the amplitude of a train of carrier pulses is varied according to the sample value of the message signal. A PAM 2 communication modality refers to a modulator that takes one bit at a time and maps the signal amplitude to one of two possible levels (two symbols), for example −1 volt and 1 volt. A PAM 4 communication modality refers to a modulator that takes two bits at a time and maps the signal amplitude to one of four possible levels (four symbols), for example −3 volts, −1 volt, 1 volt, and 3 volts. For a given baud rate, PAM 4 modulation can transmit up to twice the number of bits as PAM 2 modulation.
Therefore, it would be desirable to be able to deserialize a high-speed serial data stream using a lower clock speed that is useful for both PAM 2 and PAM 4 modalities.